We're looking for passionate engineers who want to push the boundaries of
semiconductor technology and embedded systems. Explore our open positions below.
Engineering
Analog/Mixed-Signal Design Engineer
Bangalore, India 3-5 Years Exp
Software
Embedded Firmware Engineer
Bangalore, India 2-4 Years Exp
Engineering
Layout Design Engineer
Bangalore, India 1-3 Years Exp
Verification
SoC Verification Engineer
Bangalore, India 4-6 Years Exp
Analog/Mixed-Signal Design Engineer
Description
We are seeking a highly skilled AMS Design Engineer to join our team. You will be responsible for
the architecture and design of high-performance analog and mixed-signal IPs.
Key Responsibilities
Design and simulation of Analog/Mixed-Signal circuits (PLL, ADC, DAC, LDO).
Work with layout engineers to ensure optimal performance.
Perform post-layout simulations and design verification.
Document design specifications and test results.
Requirements
B.Tech/M.Tech in Electronics/VLSI.
Strong understanding of MOSFET physics and small signal analysis.
Proficiency in EDA tools (Cadence Virtuoso, Spectre, Hspice).
Embedded Firmware Engineer
Description
Building high-performance embedded solutions for automation and industrial sectors. You will work
on low-level firmware development and hardware-software integration.
Key Responsibilities
Developed firmware for ARM Cortex-M microcontrollers.
Implement communication protocols like SPI, I2C, UART, CAN.
Debug firmware using oscilloscopes, logic analyzers, and debuggers.
Requirements
Strong C/C++ programming skills for embedded systems.
Experience with RTOS (FreeRTOS, Zephyr) is a plus.
Knowledge of bare-metal development.
Layout Design Engineer
Description
Responsible for high-quality custom layout design for memory (SRAM/ROM) and analog IPs in
advanced process nodes.
Key Responsibilities
Custom layout design of SRAM bit-cells and peripheral circuits.
Perform DRC, LVS, and Antenna checks.
Work on matching and parasitic minimization for analog blocks.
Requirements
Experience in 7nm/5nm nodes is highly preferred.
Proficiency in Cadence Virtuoso Layout XL.
SoC Verification Engineer
Description
Work on complex SoC verification using UVM/SystemVerilog methodologies. You will be responsible
for testbench architecture and coverage closure.
Key Responsibilities
Develop UVM-based verification environments.
Write test plans and functional coverage models.
Perform gate-level simulations and debug silicon issues.